1. Field of the Invention
The present invention deals with a circuit module. In particular, the present invention deals with a DRAM module comprising a plurality of DRAM memory components which are arranged on a printed circuit board or circuit board and the connections of which are connected via resistors to contact elements of the printed circuit board of the circuit module.
2. Description of Prior Art
Circuit modules and especially DRAM modules or SDRAM modules consist typically of a printed circuit board provided with a plurality of contact elements arranged along the longitudinally extending edge of the printed circuit board. In the case of circuit modules of this type, a plurality of integrated circuit components, such as DRAM modules or SDRAM modules or DDR-SDRAM modules, are arranged on the printed circuit board. SDRAM modules, i.e. single DRAM modules, represent the present standard in the case of dynamic RAM modules. DDR-SDRAM modules, i.e. double data rate DRAM modules, represent a new technology which, at present, is used more and more frequently in the field of computers. In spite of their different technologies, SDRAM modules and DDR-SDRAM modules have, typically, identical types of housings. When, and this is often desired for reasons of costs, these memory components are housed in so-called standard TSOP housings, these housings of the memory components have a size determining the overall size of the circuit module. In general, the design engineer developing such a circuit module will endeavour to keep primarily the dimensions of the printed circuit board in the width direction of the board as compact as possible, i.e. in a direction perpendicular to the longitudinal direction determined by the arrangement of the contact elements. This has the effect that the integrated circuit components extend in the width direction of the printed circuit board from the longitudinally extending edge located opposite the contact elements across most of the width of the printed circuit board. The circuit components have two rows of connections. In the case of DRAM memory components or SDRAM memory components, each of the connections used for the signal lines, which are also referred to as DQ lines, must be connected via a respective resistance element to a respective associated contact element through suitable connecting lines.
According to the specification of DRAM memory modules or SDRAM memory modules, restrictive length limitations for these connecting lines must here be observed. As will clearly be explained hereinbelow making reference to the embodiment of a prior art circuit module shown in FIG. 1, these length limitations of the connecting lines resulting from the specification of the DRAM memory modules or SDRAM memory modules lead to certain restrictions of the freedom to arrange the resistance elements and the circuit components on the printed circuit board; these restrictions have, in turn, the effect that, in the prior art, a more far-reaching reduction of the dimensions of the printed circuit board in the direction of the width of the board is not possible.
This problem will now be discussed in detail making reference to FIG. 1, which shows a top view of certain sections of a circuit module designated generally by reference numeral 1. The circuit module includes a printed circuit board 3 having a lower longitudinally extending edge 5, an upper longitudinally extending edge 7 and an edge 9 extending in the width direction. Along the lower longitudinally extending edge 5, a multipoint connector 11 is formed, which comprises a plurality of contact elements 13, which, when the multipoint connector 11 of the circuit module 1 is being inserted into a plug-contact reception means (not shown), lead to contact making with mating contact elements (not shown either). The printed circuit board 3 has arranged thereon a plurality of integrated SDRAM circuit components 15, 17, each of these SDRAM circuit components 15, 17 having, in turn, a so-called standard TSOP housing 19, 21 provided with a plurality of connections 23, 25, 27, 29 along each of its longitudinal edges.
Part of these connections 23, 25, 27, 29 of the SDRAM circuit components 15, 17 represent connections to signal lines or DQ data lines. Each of these signal-line connections 23, 25, 27, 29 is connected via a respective resistance element of an integrated resistor array component 31, 33, 35, 37 to a respective one of the contact elements 13 of the multipoint connector 11.
The specification of the SDRAM circuit components 15, 17 demands very short lengths of the lines (not shown) leading from the respective contact element 13 via one of the resistance elements of the resistor array components 31, 33, 35, 37 to one of the contact elements 13 provided for the signal lines. These length limitations can only be observed when the resistor array components 31, 33, 35, 37 are arranged in the area of the printed circuit board located between the edge of the SDRAM circuit component 15, 17 defining the lower edge in FIG. 1 and the contact elements 13. These requirements are opposed to a further reduction of the circuit module dimensions in the width direction 9 of the circuit module.